The Quasi DC Recovery circuit (QR96) can be used to improve data recovery of receiver if the raw data is transmitted without any bit balancing. The QR96 measures the minimum and maximum levels of the AF output of the receiver, averages that and compares the original AF output signal with it. The module can be used in applications where raw (non-bit balanced) data need to be transmitted and received between two UARTs.

Key Facts


Data sheet


  • Recovery of data signals with frequencies down to 2Hz
  • Tolerates time between bit transitions as long as 250ms
  • Permits non-bit balanced data stream like straight ASCII
  • Improves link margin by about 6dB, hence doubles the line of sight range on raw data
  • Customisable to different data, preamble timing requirements (e.g. NMEA sentences)
  • Wide supply range from 3.6V to 15V
  • Small size: 18.5 x 10 x 5.5mm
  • Pin outs and foot print compatible with Radiometrix SIL Receivers



Compared to conventional Data Slicer circuit currently used in the most of the FSK receivers, Quasi DC Recovery circuit can extract non-bit balanced data at RF signal level that is 6dB lower, resulting in double the range.

Conventional Data Slicers are based on simple 'RC integrate and compare' method to digitise the demodulated analogue signal, whereas, the QR96 samples positive and negative peaks of the Audio (AF) output and then averages them, before using that voltage as the comparator reference. QR96 behaves better on very unbalanced (raw) data, and at the start of bursts (where the simple RC takes time to acquire or charged to the mid average point).

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